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Glenn Boles Phones & Addresses

  • 15 Harrison St, Clark, NJ 07066
  • 132 Maple St, Avenel, NJ 07001
  • 31 Soren St, Fords, NJ 08863
  • Perth Amboy, NJ
  • Edison, NJ
  • Iselin, NJ
  • Kearny, NJ

Resumes

Resumes

Glenn Boles Photo 1

Glenn Boles

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Location:
United States

Publications

Us Patents

Clock, Data And Time Recovery Using Bit-Resolved Timing Registers

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US Patent:
7123675, Oct 17, 2006
Filed:
Sep 25, 2002
Appl. No.:
10/255008
Inventors:
Glenn M Boles - Fords NJ, US
Alfred Earl Dunlop - Kattskill Bay NY, US
Ilija Hadzic - Millington NJ, US
Manyalibo Joseph Matthews - Jersey City NJ, US
Dusan Suvakovic - Florham Park NJ, US
Doutje T. Van Veen - Berkeley Heights NJ, US
Assignee:
Lucent Technologies Inc. - Murray Hill NJ
International Classification:
H04L 7/00
US Classification:
375354, 327141, 370503, 709248, 714 12
Abstract:
A clock recovery method is disclosed wherein the FIFO delay of data words and the phase difference between a data word and a receiver clock are used to time data transmissions from a transmitter. The phase difference between the data word and the receiver clock is determined by the offset of a word relative to a desired position in a storage buffer. The FIFO delay is determined either by measuring the difference between a read pointer and a write pointer in the FIFO or, alternatively, by calculating the difference between a timestamp of the time a data word entered the FIFO and the current time as the data word is read from the FIFO.

Method And Apparatus For Multiphase, Fast-Locking Clock And Data Recovery

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US Patent:
7242739, Jul 10, 2007
Filed:
Jun 12, 2003
Appl. No.:
10/460572
Inventors:
Glenn M Boles - Fords NJ, US
Alfred Earl Dunlop - Kattskill Bay NY, US
Manyalibo Joseph Matthews - Jersey City NJ, US
Dusan Suvakovic - Florham Park NJ, US
Doutje T. Van Veen - Berkeley Heights NJ, US
Assignee:
Lucent Technologies Inc. - Murray Hill NJ
International Classification:
H03D 3/24
US Classification:
375375, 375376, 375371
Abstract:
A method and apparatus for clock and data recovery that is advantageous in burst-mode systems is disclosed. This clock and data recovery method allows a) fast locking to a rapidly changed phase of the transmission clock, and b) stable tracking of a slowly changing phase of the transmission clock. Such fast locking minimizes the “guard band” between consecutive transmission bursts, while stable tracking provides reliable data tracking, resulting in the efficient use of bandwidth. A plurality of clock signals, is generated, each having a different phase. The phase of an input signal data stream is determined and a desired clock signal in the plurality that corresponds to the phase of the input data stream is selected and used to sample the input signal data stream.

Apparatus For Enhancing Packet Communication

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US Patent:
7928866, Apr 19, 2011
Filed:
Aug 7, 2009
Appl. No.:
12/537950
Inventors:
Glenn M. Boles - Fords NJ, US
Ilija Hadzic - Millington NJ, US
Edward Stanley Szurkowski - Morristown NJ, US
Assignee:
Alcatel-Lucent USA Inc. - Murray Hill NJ
International Classification:
H03M 7/00
US Classification:
341 58, 341 95
Abstract:
An apparatus for enhancing packet communication is disclosed. In one embodiment, the apparatus includes an encoder configured to convert input data to a binary coded base system of an augmented code employing a base of an original code used for coding the input data, wherein the augmented code employs more symbols for coding than the original code, the encoder including: (1) an adder configured to add the input data to a multiplication product to generate a base sum that is binary-coded in the augmented code, (2) a multiplier configured to multiply an accumulated value by a base of the original code to provide the multiplication product that is binary-coded in the augmented code, and (3) an accumulator configured to employ the base sum to provide an accumulated value as an output for the encoder, wherein the accumulated value is binary-coded in the augmented code to represent the input data.

System And Method For Pathological Pattern Protection

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US Patent:
8259944, Sep 4, 2012
Filed:
Jun 16, 2008
Appl. No.:
12/214051
Inventors:
Dusan Suvakovic - Marina del Rey CA, US
Glenn M. Boles - Fords NJ, US
Assignee:
Alcatel Lucent - Paris
International Classification:
G06F 11/08
G06F 11/16
US Classification:
380268, 726 22
Abstract:
In a frame synchronous scrambled communications network, communications are protected from pathological bit patterns that may lead to loss of receiver lock by detecting a pathological bit pattern in an incoming traffic stream using a pathological pattern detector. When a pathological bit pattern, such as a transition-less bit pattern, is detected, a corrective bit pattern is generated and inserted or substituted into the incoming traffic stream before transmission to the receiver. The receiver can be configured to revert the modified traffic stream back to the original traffic stream.

Method And Apparatus For Enhancing Packet Communication

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US Patent:
20050058150, Mar 17, 2005
Filed:
Sep 16, 2003
Appl. No.:
10/663964
Inventors:
Glenn Boles - Fords NJ, US
Ilija Hadzic - Millington NJ, US
Edward Szurkowski - Maplewood NJ, US
International Classification:
H04L012/413
US Classification:
370445000, 370252000
Abstract:
Packet communication employs a multiplicity of packets with interpacket gaps made up of Idle symbols between such packets. In word encoding messages for the packet prescribed alphabet symbols are employed with certain other symbols left unused. Information is advantageously added in packet communication by 1) employing unused symbols in the packet, 2) substituting in the interpacket gap symbols that are not Idle symbols but are decoded as such or, 3) using both such expedients.

Electronic Data Encoding And Recognition System

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US Patent:
50198998, May 28, 1991
Filed:
Nov 1, 1988
Appl. No.:
7/265831
Inventors:
Glenn M. Boles - Fords NJ
Gary W. Schober - Edison NJ
Wen S. Chein - Piscataway NJ
Chris P. Symanski - Union NJ
Philippe Des Rioux - New York NY
Walter Tomkoski - Jamesburg NJ
Assignee:
Control Data Corporation - South Minneapolis MN
International Classification:
H04N 700
H04N 1700
US Classification:
358 84
Abstract:
The disclosure relates to an apparatus and method for creating digital signatures from frames of selected video segments such as TV commercials by a digitizing, compression and selection process which produces a multi-digit signature from each frame. The signatures are stored in a memory database. In the recognition mode broadcast video transmissions are similarly digitized frame by frame to generate signatures which are then compared with the signatures in the database to find matches. The system cycles efficiently through the database testing for signature matches and then totalizing the signature matches to determine occurrences of a match between a transmitted segment or commercial and a stored segment or commercial. The system also includes signature generating and comparison circuits which permit wide variations in the quality of the input video signals form a variety of different media sources such as off-air, videotape or camera inputs while maintaining accurate recognition.

Manchester Data Recorder With Synchronously Adjustable Clock

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US Patent:
51685116, Dec 1, 1992
Filed:
Oct 22, 1990
Appl. No.:
7/600621
Inventors:
Glenn Boles - Fords NJ
Assignee:
Berkeley Varitronics Systems, Inc. - Metuchen NJ
International Classification:
H03M 512
US Classification:
375 82
Abstract:
A synchronous digital decoding circuit decodes Manchester-encoded data using a clock regenerating circuit which produces a decoding clock that is continuously adjusted in accordance with detected phase deviations in the received data signal. The Manchester-encoded data are transmitted with high-to-low and low-to-high transitions at the centers of the data bit cells. On the receiving end, a digital state machine, which is coupled to a timer/counter unit, detects whether a transition is on-time, early, or late in each bit cell as compared with the established decoding clock. If the transition is early or late, the state machine produces a correction signal which is used to correspondingly shorten or lengthen the clock count by a predetermined incremental amount. The adjustment of the clock counts on an on-going basis reduces or eliminates the phase deviation and prevents the accumulation of phase error over an extended length of time. In the preferred embodiment, an oscillator input of 1.

Frequency Measuring System

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US Patent:
50897705, Feb 18, 1992
Filed:
Feb 20, 1990
Appl. No.:
7/482405
Inventors:
Xiaoyang Lee - New York NY
Glenn M. Boles - Fords NJ
Assignee:
Lunayach Communications Consultants - Arlington VA
International Classification:
G01R 2310
US Classification:
324 78D
Abstract:
The disclosure is of a system for measuring the frequency of an audio signal by converting the signal to a rectangular wave, counting the number of oscillator pulses which can be generated during one cycle of said wave and decoding the number of pulses to obtain the frequency of the audio signal.
Glenn J Boles from Clark, NJ, age ~47 Get Report