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Salem A Abdennadher

from Laguna Beach, CA
Age ~54

Salem Abdennadher Phones & Addresses

  • Laguna Beach, CA
  • 600 Morris Way, Sacramento, CA 95864 (916) 972-8687
  • 2929 Routier Rd, Sacramento, CA 95827 (916) 366-3420
  • San Diego, CA
  • Albany, OR
  • Corvallis, OR
  • 417 San Miguel Way, Sacramento, CA 95819 (916) 972-8687

Work

Position: Building and Grounds Cleaning and Maintenance Occupations

Education

Degree: Bachelor's degree or higher

Resumes

Resumes

Salem Abdennadher Photo 1

Salem Abdennadher

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Location:
Sacramento, California Area
Industry:
Computer Hardware
Salem Abdennadher Photo 2

Salem Abdennadher

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Publications

Us Patents

Analog Filter With Built-In Self Test

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US Patent:
6777921, Aug 17, 2004
Filed:
Jan 30, 2002
Appl. No.:
10/062180
Inventors:
Salem Abdennadher - Sacramento CA
Hassan Ihs - Sacramento CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G01R 2316
US Classification:
324 7622, 324 7645
Abstract:
An analog filter in an integrated circuit is tested by placing the filter in a feedback loop. The filter is tested by determining whether the analog filter, while in the feedback loop, provides a signal that oscillates within a predetermined tolerance of an expected frequency.

On-Chip Testing Of Integrated Circuits

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US Patent:
6836872, Dec 28, 2004
Filed:
Sep 24, 2002
Appl. No.:
10/255155
Inventors:
Salem Abdennadher - Sacramento CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 1750
US Classification:
716 4, 714 30, 714733
Abstract:
A method comprises inserting into a behavioral model of an integrated circuit component a corresponding built-in self-test structure from a library of built-in self-test structures that correspond to integrated circuit components and using the behavioral model to verify whether the inserted built-in self-test structure would detect a fault in the component.

Circuit Modeling

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US Patent:
6868534, Mar 15, 2005
Filed:
Mar 13, 2002
Appl. No.:
10/099587
Inventors:
Farag Fattouh - Folsom CA,
Salem Abdennadher - Sacramento CA,
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F017/50
US Classification:
716 6, 716 1
Abstract:
Modeling a circuit includes producing a first behavioral model of a circuit based on a transistor model of the circuit. A second behavioral model is produced of a noise source coupled to the circuit based on the first behavioral model and based on a transistor model of the noise source. A response of the second behavioral model to an input signal is generated.

Testing A Multi-Channel Device

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US Patent:
7088091, Aug 8, 2006
Filed:
Aug 14, 2003
Appl. No.:
10/640913
Inventors:
Salem Abdennadher - Sacramento CA,
Assignee:
Intel Corporation - Santa Clrara CA
International Classification:
G01R 31/28
US Classification:
3241581
Abstract:
In one embodiment, a method includes routing first test data from a first channel of a device to a second channel of the device, and outputting the first test data from the second channel. The device, in one embodiment, may be a mixed signal device and the test data may be alternating current test data.

On-Chip Jitter Testing

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US Patent:
7409621, Aug 5, 2008
Filed:
Dec 26, 2002
Appl. No.:
10/331122
Inventors:
Hassan Ihs - Sacramento CA,
Salem Abdennadher - Sacramento CA,
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G01R 31/317
G01R 31/40
US Classification:
714744, 714 55
Abstract:
On-chip jitter testing includes providing a clock signal to a circuit under test and delaying outputs from the circuit under test by predetermined delay values. For each delay value, a corresponding output from the circuit under test is compared with a reference signal derived from the clock signal to produce a bit error rate count for each delay value. A jitter value in the output of the circuit under test is determined based on the bit error rate counts.

Timing Variation Measurements

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US Patent:
20030210028, Nov 13, 2003
Filed:
May 8, 2002
Appl. No.:
10/142645
Inventors:
Chad Beach - Fair Oaks CA,
Salem Abdennadher - Sacramento CA,
International Classification:
G06M001/10
US Classification:
324/076160
Abstract:
Measuring timing variations in a periodic signal includes producing trigger signals in an integrated circuit in response an externally-generated periodic signal. First and second oscillation signals are generated in response to the trigger signals. A first count of the number of pulses in the first oscillation signal from occurrence of the first oscillation signal until the oscillation signals are in phase and providing a second count of the number of pulses in the second oscillation signal from occurrence of the second oscillation signal until the oscillation signals are in phase.
Salem A Abdennadher from Laguna Beach, CA, age ~54 Get Report